Title
Macrosimulation with Quasi-general Symbolic FET Macromodel and Functional Latency
Abstract
This paper evaluates our attempt to solve the large network analysis problems in the time domain by use of a simulation method with computation efficiency and program simplicity. We present a Quasi-general Symbolic FET Macromodel (QGSM) which can represent many different logic function gates; hence, the simulation program needs only one macromodel QGSM. We also discuss the Functional Latency Concept (FLC). With FLC we can avoid analyzing more inactive subnetworks to realize savings in CPU time. Finally, we describe a triple-iteration loop method which can be readily incorporated into the time-domain analysis. The experimental program exhibits topological flexibility, computational accuracy, and programming simplicity.
Year
DOI
Venue
1979
10.1109/DAC.1979.1600112
DAC
Keywords
DocType
ISBN
quasi-general symbolic fet macromodel,time domain,program simplicity,simulation program,functional latency,large network analysis problem,experimental program,cpu time,programming simplicity,macromodel qgsm,simulation method,time-domain analysis,computational modeling,data systems,design automation,network analysis,computer networks
Conference
978-0-89791-020-0
Citations 
PageRank 
References 
0
0.34
0
Authors
2
Name
Order
Citations
PageRank
H. Y. Hsieh100.68
N. B. Rabbat201.01