Paper Info
Title
Graphene-enabled wireless communication for massive multicore architectures.
Abstract
Current trends in microprocessor architecture design are leading towards a dramatic increase of core-level parallelization, wherein a given number of independent processors or cores are interconnected. Since the main bottleneck is foreseen to migrate from computation to communication, efficient and scalable means of inter-core communication are crucial for guaranteeing steady performance improvements in many-core processors. As the number of cores grows, it remains unclear whether initial proposals, such as the Network-on-Chip (NoC) paradigm, will meet the stringent requirements of this scenario. This position paper presents a new research area where massive multicore architectures have wireless communication capabilities at the core level. This goal is feasible by using graphene-based planar antennas, which can radiate signals at the Terahertz band while utilizing lower chip area than its metallic counterparts. To the best of our knowledge, this is the first work that discusses the utilization of graphene-enabled wireless communication for massive multicore processors. Such wireless systems enable broadcasting, multicasting, all-to-all communication, as well as significantly reduce many of the issues present in massively multicore environments, such as data coherency, consistency, synchronization and communication problems. Several open research challenges are pointed out related to implementation, communications and multicore architectures, which pave the way for future research in this multidisciplinary area.
Year
DOI
Venue
2013
10.1109/MCOM.2013.6658665
IEEE Communications Magazine
Keywords
Field
DocType
multiprocessing systems,network-on-chip,planar antennas,radiocommunication,NoC paradigm,Terahertz band,all-to-all communication,broadcasting,communication problems,core level parallelization,data coherency,graphene based planar antennas,graphene enabled wireless communication,intercore communication,many core processors,massive multicore architectures,massive multicore processors,metallic counterparts,microprocessor architecture design,multicasting,multicore environments,network on chip,steady performance improvements,synchronization,wireless systems
Bottleneck,Broadcasting,Synchronization,Wireless,Computer science,Network on a chip,Computer network,Multicast,Multi-core processor,Scalability,Distributed computing
Journal
Volume
Issue
ISSN
51
11
0163-6804
Citations 
PageRank 
References 
18
0.87
0
Authors
5
Name
Order
Citations
PageRank
Sergi Abadal118022.96
Eduard Alarcón239164.43
Albert Cabellos-Aparicio341846.33
Max C. Lemme4183.57
Mario Nemirovsky528636.40