Abstract | ||
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In this paper we describe how we have used Pin to generate a multithreaded reference stream for simulation of a multiprocessor on a uniprocessor. We have taken special care to model as accurately as possible the effects of cache coherence protocol state, and lock and barrier synchronization on the performance of multithreaded applications running on multiprocessor hardware.We first describe a simplified version of the algorithm, which uses semaphores to synchronize instrumented application threads and the simulator. We then describe modifications to that algorithm to model the microarchitectural features of the Itanium2 that affect the timing of memory reference issue. An experimental evaluation determines that, while our methods enable accurate simulation, the use of semaphores has negative impact on the performance of the simulator. |
Year | DOI | Venue |
---|---|---|
2005 | 10.1145/1127577.1127586 | SIGARCH Computer Architecture News |
Keywords | Field | DocType |
instrumented application thread,barrier synchronization,multithreaded application,accurate simulation,experimental evaluation,multithreaded reference stream,memory reference issue,memory reference generator,cache coherence protocol state,microarchitectural feature,multiprocessor hardware,multiprocessor simulation,cache coherence | Uniprocessor system,Synchronization,Semaphore,Computer science,Lock (computer science),Parallel computing,Thread (computing),Multiprocessing,Cache coherence | Journal |
Volume | Issue | Citations |
33 | 5 | 7 |
PageRank | References | Authors |
0.48 | 4 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Collin McCurdy | 1 | 427 | 27.04 |
Charles N. Fischer | 2 | 455 | 75.55 |