Name
Title | ||
|---|---|---|
Improving Scalability and Per-Core Performance in Multi-Cores through Resource Sharing and Reconfiguration |
Abstract | ||
|---|---|---|
This paper presents a low-power LDPC decoder design for additive white Gaussian noise (AWGN) channels. The proposed decoding scheme provides constant-time decoding and thus facilitates real-time applications where guaranteed data rate is required. It ... |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/VLSI.Design.2009.58 | VLSI Design |
Keywords | Field | DocType |
low-power ldpc decoder design,guaranteed data rate,facilitates real-time application,per-core performance,improving scalability,additive white gaussian noise,proposed decoding scheme,constant-time decoding,hardware,scalability,resource sharing,multi core processor,resource management,bandwidth,very large scale integration,chip,instruction level parallelism,multicore processing,reconfigurable hardware,multicore processor | Instruction-level parallelism,Single-core,Computer architecture,Computer science,Real-time computing,Chip,Bandwidth (signal processing),Multi-core processor,Control reconfiguration,Reconfigurable computing,Scalability | Conference |
ISSN | Citations | PageRank |
1063-9667 | 1 | 0.35 |
References | Authors | |
21 | 2 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tameesh Suri | 1 | 49 | 5.44 |
| Aneesh Aggarwal | 2 | 202 | 16.91 |