Name
Title | ||
|---|---|---|
A Reconfigurable WSI Massively Data-Parallel Processing Device for Cost-Effective 3D Sensor Data Processing |
Abstract | ||
|---|---|---|
A performance-scalable ISDP (Interactive Sensor Data Processing) workstation, accelerated with commercial PCI multiprocessor cards, is described and a WSI Massively data-Parallel Processor (MdPP) device is proposed for the replacement of its VLSI processors. Delivering 60 GOPS for 16-bit integer multiply-accumulate operations, a WSI-FPGA implementation of the reconfigurable device is shown to be better suited to ISDP applications and at least two orders-of-magnitude more cost-effective. |
Year | DOI | Venue |
|---|---|---|
2000 | 10.1109/DFTVS.2000.887146 | DFT |
Keywords | Field | DocType |
add-on boards,field programmable gate arrays,parallel processing,pipeline processing,reconfigurable architectures,sensor fusion,wafer-scale integration,16 bit,FPGA implementation,Interactive Sensor Data Processing,PCI multiprocessor cards,cost-effective 3D sensor data processing,massively data-parallel processing device,multiply-accumulate operations,performance-scalable ISDP,reconfigurable WSI | Data processing,Computer science,16-bit,Workstation,Field-programmable gate array,Electronic engineering,Sensor fusion,Multiprocessing,Computer hardware,Very-large-scale integration,Wafer-scale integration,Embedded system | Conference |
ISSN | ISBN | Citations |
1550-5774 | 0-7695-0719-0 | 0 |
PageRank | References | Authors |
0.34 | 1 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| R. M. Lea | 1 | 33 | 21.58 |
| P. T. Tetnowski | 2 | 0 | 1.35 |
| M. Covic | 3 | 0 | 0.34 |