Title | ||
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Communication-aware task scheduling for multi-core architectures with segmented buses |
Abstract | ||
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As the number of cores on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance, and energy consumption of the overall system. This paper presents a mesh-like connected multi-core architecture with segmented buses to meet the requirements of high performance and low energy consumption. Based on the proposed architecture, a communication-aware greedy task scheduling is designed to minimize the communication energy consumption among cores while maintaining the same performance as other scheduling algorithms. We evaluate the algorithm performance through a series of experiments with Gaussian Elimination, and the experimental results confirm the effectiveness of the algorithm. |
Year | DOI | Venue |
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2011 | 10.1109/BMEI.2011.6098730 | 2011 4th International Conference on Biomedical Engineering and Informatics (BMEI) |
Keywords | Field | DocType |
Multi-Core Architecture,Segmented Buses,Communication Energy Consumption,Greedy Algorithm,Gaussian Elimination | Architecture,Fair-share scheduling,Low energy,Scheduling (computing),Computer science,Chip,Gaussian elimination,Multi-core processor,Energy consumption,Distributed computing | Conference |
Volume | Issue | ISSN |
4 | null | 1948-2914 |
ISBN | Citations | PageRank |
978-1-4244-9351-7 | 0 | 0.34 |
References | Authors | |
0 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Yuping Zhang | 1 | 4 | 0.75 |
Xianbin Xu | 2 | 32 | 5.62 |
Yuanhua Yang | 3 | 0 | 1.69 |
Shuibing He | 4 | 109 | 20.45 |
Zimian Hao | 5 | 0 | 1.35 |