Paper Info
Title
A Real-Time Motion-Feature-Extraction Image Processor Employing Digital-Pixel-Sensor-Based Parallel Architecture
Abstract
A VLSI image processor capable of extracting motion features from moving images in real time has been developed employing row-parallel and pixel-parallel architectures based on the digital pixel sensor (DPS) technology. Directional edge filtering of input images is carried out in row-parallel processing to minimize the chip real estate. To achieve a real-time response of the system, a fully pixel-parallel architecture has been explored in adaptive binarization of filtered images for essential feature extraction as well as in their temporal integration and derivative operations. As a result, self-speed-adaptive motion-feature-extraction has been established. The chip was designed and fabricated in a 65-nm CMOS technology and used to build an object detection system. Motion-sensitive target image localization was demonstrated as an illustrative example.
Year
DOI
Venue
2012
10.1109/ISCAS.2012.6271563
2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012)
Keywords
Field
DocType
adders,sorting,very large scale integration,feature extraction
Feature detection (computer vision),Computer science,Edge detection,Electronic engineering,Image processor,Artificial intelligence,Computer hardware,Very-large-scale integration,Computer vision,Object detection,Feature (computer vision),Filter (signal processing),Feature extraction
Conference
ISSN
Citations 
PageRank 
0271-4302
5
0.63
References 
Authors
3
2
Name
Order
Citations
PageRank
Hongbo Zhu1194.14
Tadashi Shibata210416.61