Title
Circuit techniques for a 1.8-V-only NAND flash memory
Abstract
Focusing on internal high-voltage (V/sub pp/) switching and generation for low-voltage NAND flash memories, this paper describes a V/sub (pp)/ switch, row decoder, and charge-pump circuit. The proposed nMOS V/sub pp/ switch is composed of only intrinsic high-voltage transistors without channel implantation, which realizes both reduction of the minimum operating voltage and elimination of the V/sub...
Year
DOI
Venue
2002
10.1109/4.974549
IEEE Journal of Solid-State Circuits
Keywords
DocType
Volume
Switches,Voltage,Switching circuits,Charge pumps,Decoding,Flash memory,Energy consumption,MOS devices,Leakage current,Batteries
Journal
37
Issue
ISSN
Citations 
1
0018-9200
21
PageRank 
References 
Authors
3.07
4
4
Name
Order
Citations
PageRank
Toru Tanzawa16614.08
Tomoharu Tanaka23232.18
Ken Takeuchi3308.01
Hiroshi Nakamura4213.07