Name
Title | ||
|---|---|---|
High performance architectures for the arithmetic encoder of the H.264/AVC CABAC entropy coder. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/ICECS.2010.5724533 | ICECS |
Keywords | Field | DocType |
application specific integrated circuits,arithmetic codes,encoding,field programmable gate arrays,video coding,ASIC,FPGA synthesis,H.264/AVC CABAC entropy coder,arithmetic encoder,high performance architectures,video encoding,ASIC,Architecture,CABAC,FPGA,H.264 | Logic gate,Context-adaptive variable-length coding,Computer science,Field-programmable gate array,Application-specific integrated circuit,Electronic engineering,Encoder,Cycles per instruction,Context-adaptive binary arithmetic coding,Encoding (memory) | Conference |
Citations | PageRank | References |
1 | 0.41 | 4 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Vagner S. Rosa | 1 | 17 | 6.40 |
| Leandro Max Silva | 2 | 3 | 0.93 |
| sergio bampi | 3 | 496 | 102.12 |