Title | ||
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Single reference frame multiple current macroblocks scheme for multi-frame motion estimation in H.264/AVC |
Abstract | ||
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Due to the multi-frame motion estimation (ME), H.264/AVC requires ultra high memory bandwidth. Conventional Multiple Reference frames Single Current macroblock (MRSC) scheme only considers the data reuse within one frame, requiring on-chip memory size and off-chip memory bandwidth in propor- tional to the number of reference frames. In this paper, a Single Reference frame Multiple Current macroblocks (SRMC) scheme is presented to further exploit the data reuse between multiple frames. With rescheduling of the macroblock (MB) procedures at frame level, one loaded search window can be utilized by multiple current MBs in different frames. The demanded memory size and bandwidth for multi-frame ME can thus be reduced to those of MRSC scheme with only one reference frame. Moreover, based on SRMC, a system architecture for H.264/AVC encoding is proposed. For HDTV specifications, 62.21KB (74.8%) of SRAM and 364.3MB/s (62.6%) of system bandwidth are saved in comparison with MRSC scheme. |
Year | DOI | Venue |
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2005 | 10.1109/ISCAS.2005.1464956 | ISCAS (2) |
Keywords | Field | DocType |
very large scale integration,bandwidth,encoding,motion estimation,digital signal processing,reference frame,system architecture,memory bandwidth,chip | Reference frame,Macroblock,Block-matching algorithm,Memory bandwidth,Computer science,Electronic engineering,Residual frame,Bandwidth (signal processing),Motion estimation,Encoding (memory) | Conference |
Citations | PageRank | References |
9 | 0.85 | 7 |
Authors | ||
5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Tung-Chien Chen | 1 | 791 | 78.22 |
Yu-Wen Huang | 2 | 1116 | 114.02 |
Chuan-Yung Tsai | 3 | 69 | 6.39 |
Chao-tsung Huang | 4 | 440 | 38.76 |
Liang-Gee Chen | 5 | 3637 | 383.22 |