Name
Abstract | ||
|---|---|---|
This paper presents a novel predication scheme that was applied to a SIMD system-on-chip. This approach was devised by improving and combining the unrestricted predication model and the guarded execution model. It is shown that significant execution autonomy is added to the SIMD processing elements and that the code size is reduced considerably. Finally, the implemented predication scheme is compared with predication schemes of general purpose processors, and it is shown that it enables more efficient if-conversion compilations than previous architectures. |
Year | DOI | Venue |
|---|---|---|
2002 | 10.1007/3-540-45706-2_118 | Euro-Par |
Keywords | Field | DocType |
efficient if-conversion compilation,general purpose processor,novel predication scheme,guarded execution model,predication scheme,simd system-on-chip,code size,unrestricted predication model,significant execution autonomy,simd processing element,system on chip | System on a chip,Code size,General purpose,Computer science,Parallel computing,SIMD,Chip,Execution model,Systems architecture,Branch predication | Conference |
Volume | ISSN | ISBN |
2400 | 0302-9743 | 3-540-44049-6 |
Citations | PageRank | References |
4 | 0.52 | 6 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Alexander Paar | 1 | 44 | 6.69 |
| Manuel L. Anido | 2 | 12 | 2.79 |
| Nader Bagherzadeh | 3 | 1674 | 182.54 |