Title
A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology.
Year
DOI
Venue
2012
10.1109/ISSCC.2012.6177077
ISSCC
Keywords
Field
DocType
interference,pipelines,computer architecture,bit error rate
Nand flash memory,Coupling,Flash memory,Computer science,High density,NAND gate,Interference (wave propagation),Throughput,Computer hardware,Embedded system,Bit error rate
Conference
Citations 
PageRank 
References 
11
1.98
2
Authors
37
Name
Order
Citations
PageRank
Daeyeal Lee1111.98
Ik Joon Chang219925.32
Sangyong Yoon3537.90
Joonsuc Jang4112.32
Dong-Su Jang5345.09
Wook-Ghee Hahn6418.19
Jong-Yeol Park7192.89
Doo-Gon Kim8367.11
Chiweon Yoon9112.32
Bong-Soon Lim10111.98
ByungJun Min11477.67
Sung-Won Yun12192.89
Ji-Sang Lee13293.70
Il-Han Park14406.31
Kyung-Ryun Kim15112.32
Jeong-Yun Yun16111.98
Youse Kim17203.12
Yong-Sung Cho18404.95
Kyungmin Kang19517.13
Sang-Hyun Joo20696.60
Jin-Young Chun21112.32
Jung-No Im22192.55
Seunghyuk Kwon23111.98
Seokjun Ham24111.98
Ansoo Park25284.24
Jae-Duk Yu26111.98
Namhee Lee27224.01
Taesung Lee28967.46
Moosung Kim29607.39
Hoosung Kim30192.55
Ki-Whan Song31589.66
Byung-Gil Jeon32225.40
Kihwan Choi3334722.33
Jin-Man Han348211.68
Kyehyun Kyung3514218.84
Young-Ho Lim368117.55
Young-Hyun Jun37111.98