Name
Title | ||
|---|---|---|
Design and implementation of an adaptive proactive reconfiguration technique for SRAM caches |
Abstract | ||
|---|---|---|
Scaling of device dimensions toward nano-scale regime has made it essential to innovate novel design techniques for improving the circuit robustness. This work proposes an implementation of adaptive proactive reconfiguration methodology that can first monitor process variability and BTI aging among 6T SRAM memory cells and then apply a recovery mechanism to extend the SRAM lifetime. Our proposed technique can extend the memory lifetime between 2X to 4.5X times with a silicon area overhead of around 10% for the monitoring units, in a 1kB 6T SRAM memory chip. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.7873/DATE.2013.269 | DATE |
Keywords | Field | DocType |
circuit robustness,sram memory chip,sram cache,device dimension,nano-scale regime,memory lifetime,adaptive proactive reconfiguration technique,monitor process variability,sram memory cell,sram lifetime,adaptive proactive reconfiguration methodology,monitoring unit,aging,degradation | Sense amplifier,Tag RAM,Computer science,Parallel computing,Static random-access memory,Real-time computing,Recovery mechanism,Robustness (computer science),Universal memory,Process variability,Control reconfiguration | Conference |
ISSN | Citations | PageRank |
1530-1591 | 0 | 0.34 |
References | Authors | |
9 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Peyman Pouyan | 1 | 31 | 6.80 |
| E. Amat | 2 | 30 | 10.36 |
| Francesc Moll | 3 | 55 | 14.87 |
| Antonio Rubio | 4 | 18 | 5.41 |