Name
Abstract | ||
|---|---|---|
Two of the major concerns in 3D stacked technology are heat removal and power density distribution. In our work, we propose a novel 3D thermal-aware floorplanner. Our contributions include:1.A novel multi-objective formulation to consider the thermal and performance constraints in the optimization approach. 2.Two efficient Multi-Objective Evolutionary Algorithm (MOEA) for the representation of the floorplanning model and for the optimization of thermal parameters and wire length. 3.A smooth integration of the MOEA model with an accurate thermal modeling of the architecture. The experimental work is conducted for two realistic many-core single-chip architectures: an homogeneous system resembling INTEL's SCC, and an improved heterogeneous setup. The results show promising improvements of the mean and peak temperature, as well as the thermal gradient, with a reduced overhead in the wire length of the system. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1016/j.vlsi.2012.04.003 | Microprocessors and Microsystems - Embedded Hardware Design |
Keywords | DocType | Volume |
performance,design | Journal | 46 |
Issue | ISSN | Citations |
1 | 0167-9260 | 8 |
PageRank | References | Authors |
0.55 | 22 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| david cuesta | 1 | 26 | 1.53 |
| jose l riscomartin | 2 | 20 | 1.99 |
| José L. Ayala | 3 | 180 | 20.44 |