Title
Development of a verification method for timed function blocks using ESDT and SMV
Abstract
As programmable logic controllers (PLCs) are widely used in the digital instrumentation and control (I&C) systems of nuclear power plants (NPPs), the safety of PLC software has become the most important consideration. In this work, we propose a method to perform effective verification activities on the traceability analysis and the software design evaluation in the software design phase. In order to perform the traceability analysis between software requirement specification (SRS) written in a natural language and software design specification (SDS) written in function block diagram (FBD), this method uses extended- structured decision table (ESDT). ESDTs include information related to the traceability analysis from SRS and SDS, respectively. Through comparing with two ESDTs, an effective traceability analysis can be achieved. For the software design evaluation, we use model checking as a formal verification method. FBD-style design specification is translated into symbolic model verifier (SMV) input language and then the FBD-style design specification can be formally analyzed using SMV model checker.
Year
DOI
Venue
2004
10.1109/HASE.2004.1281764
HASE
Keywords
Field
DocType
programmable controllers,fbd-style design specification,function block diagram,formal verification method,programmable logic controllers,plc software,software requirement specification,esdt,fbd,symbolic model verifier,sds,smv model checker,software design specification,digital instrumentation/control,software design evaluation,extended structured decision table,effective traceability analysis,function block,traceability analysis,software architecture,software design phase,nuclear power plants,program verification,formal verification,srs,software performance,decision table,power generation,software requirements specification,control systems,programmable logic controller,software design,model checking,natural language,digital control
Software design,Model checking,Programming language,Computer science,Real-time computing,Software engineering,Software construction,Software verification and validation,Design specification,Software requirements specification,Reliability engineering,Formal verification,Software verification
Conference
ISSN
ISBN
Citations 
1530-2059
0-7695-2094-4
1
PageRank 
References 
Authors
0.37
0
3
Name
Order
Citations
PageRank
Myung Jun Song110.37
Seo Ryong Koo241.63
Poong-hyun Seong311524.53