Paper Info
Title
Energy-Aware Cache Partition Based on Way-Adaptable in CMP
Abstract
Improving processor performance and reducing energy consumption of the cache has become research topic of the next-generation processor. This paper proposes a new mechanism that implemented in CMP to reduce energy consumption, which based on dynamically way-adaptable cache. The mechanism mainly consists of way reallocate module and dynamic power control module. Way reallocate module reassign ways between cores based on thread's working set on the execution of the program. Our mechanism implements low power consumption by dynamic power control module. The proposed scheme based on dynamically way-adaptable cache is implemented and simulated. We applied several programs selected from SPEC2000 as benchmarks. Experiment results show our present scheme can reduce power consumption 18.6%, 14.7% on average with little performance degrade or no performance degrade.
Year
DOI
Venue
2012
10.1109/PDCAT.2012.73
PDCAT
Keywords
Field
DocType
cmp,chip multiprocessor,power aware computing,low power consumption,power consumption,dynamic power control module,microprocessor chips,cache storage,energy consumption reduction,processor performance,way-adaptable cache,module reassign way,power conservation,improving processor performance,energy conservation,spec2000 program,next-generation processor,way reallocate module,dynamically way-adaptable cache,multiprocessing systems,energy-aware cache partition,energy consumption,new mechanism,way-adaptable caches,performance degrade
Cache pollution,Working set,Computer science,Cache,Page cache,Real-time computing,Cache algorithms,Cache coloring,Smart Cache,Energy consumption,Distributed computing
Conference
ISBN
Citations 
PageRank 
978-0-7695-4879-1
0
0.34
References 
Authors
12
2
Name
Order
Citations
PageRank
Fang Juan100.34
Wang Shuai2236.46