Name
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/ISSCC.2013.6487605 | ISSCC |
Keywords | Field | DocType |
CMOS integrated circuits,MOSFET,electrostatic discharge,integrated circuit design,radiofrequency integrated circuits,semiconductor device models,silicon-on-insulator,BSIM transistor model,EDA tool,ESD,FinFET,RF design,analog-RF-centric comparison,bias stress,device modeling,electrostatic discharge protection,foundry,integrated RF transceiver,mixed-signal design,next-generation CMOS,passive component,technology awareness,technology modeling,ultra-thin-body SOI technology | Transistor model,Electrostatic discharge,Computer science,BSIM,Electronic engineering,CMOS,Integrated circuit design,Mixed-signal integrated circuit,Design process,Electronic component,Electrical engineering | Conference |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Boris Murmann | 1 | 594 | 82.64 |
| Jafar Savoj | 2 | 154 | 27.84 |
| Piet Wambacq | 3 | 529 | 96.10 |
| Jieh-Tsorng Wu | 4 | 0 | 0.34 |