Name
Abstract | ||
|---|---|---|
In this paper, we propose a new scheme for packet-switched bufferless Networks-on-Chip (NoCs). The goal is to reduce the area and power consumption while providing high performance. In the proposed scheme, we develop a new bufferless routing algorithm. Extensive cycle-accurate simulations have been conducted to show that the proposed scheme delivers a superior performance compared to both traditional buffered and bufferless methods. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/IC-NC.2010.12 | ICNC |
Keywords | Field | DocType |
new bufferless,bufferless networks-on-chip,bufferless method,express circuit switching,extensive cycle-accurate simulation,packet-switched bufferless networks-on-chip,proposed scheme,high performance,power consumption,new scheme,superior performance,bandwidth,circuit switched,network routing,power efficiency,routing,network on chip,pipelines | Electrical efficiency,Pipeline transport,Circuit switching,Network routing,Computer science,Network on a chip,Computer network,Bandwidth (signal processing),Power consumption,Routing algorithm | Conference |
Citations | PageRank | References |
1 | 0.35 | 9 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jing Lin | 1 | 57 | 8.71 |
| Xiaola Lin | 2 | 1099 | 78.09 |