Paper Info
Title
Improved Lock-Time in All-Digital Phase-Locked Loops Due to Binary Search Acquisition
Abstract
A binary search algorithm for an improved settling time in phase-domain all-digital phase-locked loops (ADPLLs) is proposed. Therefore, an ADPLL structure for high-speed fractional-N frequency synthesis is adapted to extract the ratio between the reference and the output frequency in each reference cycle. A frequency detector compares the obtained ratio to the ideal value. The proposed control algorithm uses the frequency detector output to iteratively search for the desired tuning word. The binary search acquisition speeds-up the acquisition process significantly and suits digitally controlled oscillators with multiple varactor banks well. Behavioral simulations illustrate the proposed technique.
Year
DOI
Venue
2008
10.1109/ICECS.2008.4674871
ICECS
Keywords
Field
DocType
phase locked loops,binary search,digitally controlled oscillator,bandwidth,detectors,settling time,tuning,digital control
Phase-locked loop,Oscillation,Computer science,Settling time,Control engineering,Electronic engineering,Bandwidth (signal processing),Binary search algorithm,Detector,Digital control,Varicap
Conference
Citations 
PageRank 
References 
0
0.34
4
Authors
2
Name
Order
Citations
PageRank
stefan mendel1432.96
Christian Vogel236128.88