Title
Fast Timed Cosimulation of HW/SW Implementation of Embedded Multiprocessor SoC Communication
Abstract
To fast evaluate HW/SW implementation of multiprocessor SoC communication, we present a method to simulating operating systems (OS's) on a simulation host without running instruction set simulators and generic OS simulation models. The method enables fast timed OS simulation including the preemption of task execution. Together with the fast simulation of synthesizable HW code (e.g. in synthesizable C), it will enable fast evaluation of HW/SW implementation of multiprocessor SoC communication.
Year
DOI
Venue
2001
10.1109/HLDVT.2001.972811
HLDVT
Keywords
DocType
ISBN
generic os simulation model,os simulation,synthesizable hw code,simulation host,multiprocessor soc communication,sw implementation,instruction set simulator,fast simulation,fast evaluation,synthesizable c,fast timed cosimulation,simulation model,network on a chip,space exploration,communication channels,system on a chip,preemption,protocols,soc,laser sintering,operating systems,operating system,communication networks,embedded systems,switches
Conference
0-7695-1411-1
Citations 
PageRank 
References 
2
0.41
10
Authors
4
Name
Order
Citations
PageRank
Sungjoo Yoo1139896.56
Gabriela Nicolescu239451.13
Lovic Gauthier315117.13
Ahmed A.Jerraya41031123.45