Name
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/ETSYM.2010.5512759 | European Test Symposium |
Keywords | Field | DocType |
fault tolerant computing,field programmable gate arrays,reconfigurable architectures,system-on-chip,LEON3 open-source processor,Virtex 4 FPGA,field programmable gate array,hardware hypervisor,microprocessor fault-tolerance,partial reconfiguration,fault tolerance,graceful degradation,partial reconfiguration,self-repair architectures | Central processing unit,System on a chip,Computer science,Hypervisor,Field-programmable gate array,Real-time computing,Proof of concept,Fault tolerance,Virtex,Control reconfiguration,Embedded system | Conference |
Citations | PageRank | References |
11 | 0.63 | 8 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Stefano Di Carlo | 1 | 293 | 46.01 |
| Andrea Miele | 2 | 18 | 2.14 |
| Paolo Prinetto | 3 | 854 | 108.51 |
| Antonio Trapanese | 4 | 11 | 0.63 |