Name
Abstract | ||
|---|---|---|
Due to weaknesses in circuit synthesis methods used in today’s CAD tools, the opportunities created by modern microelectronic technology cannot effectively be exploited. This paper considers major issues and requirements of circuit synthesis for the nano CMOS technologies, and discusses our new information-driven circuit synthesis technology that satisfies these requirements. It focuses on an adequate technology library modelling for information-driven circuit synthesis. The new circuit synthesis technology considerably differs from all other known synthesis methods and overcomes their main weaknesses. The experimental results demonstrate that it is able to produce very fast, compact and low-power circuits. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1109/DSD.2008.13 | DSD |
Keywords | DocType | Citations |
nanoelectronics,logic synthesis,cmos integrated circuits,boolean functions,logic gates,satisfiability,construction industry,integrated circuit design | Conference | 1 |
PageRank | References | Authors |
0.38 | 5 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Lech Józwiak | 1 | 231 | 34.79 |
| Szymon Bieganski | 2 | 1 | 1.06 |