Paper Info
Title
On the Potentials of Segment-Based Routing for NoCs
Abstract
The topology, the routing algorithm and the way the traffic pattern is distributed over the network influence the ultimate performance of the interconnection network. Off-chip high-performance interconnects provide mechanisms to support irregular topologies, whereas in on-chip networks the topology is fixed at design time. Continuous trend on device miniaturization and high volume manufacturing increase the probability of faults in embedded systems, leading to irregular topologies. Also, partitionability and virtualization of the entire on-chip network is envisioned for future systems. These trends lead to the need of routing algorithms that adapt to the static or dynamic changes in irregular topologies.In this paper we analyze the benefits of the reconfiguration at the routing algorithm level in order to allow topology changes. That is, support topology changes that appear on the network due to different reasons including switch or link failures, energy reduction decisions or design and manufacturing issues. We perform an exhaustive analysis on the performance impact of the routing algorithm in a NoC system. Our aim is to enable the possibility of reconfiguration of the routing algorithm. We take advantage on the flexibility offered by the segment-based routing methodology that allows a fast computation of many deadlock-free routing algorithms by obtaining different segmentation processes and routing restriction policies. This study analyzes the potentials offered by SR. Results show that the election of the routing algorithm may greatly affect the final performance of the network. Additionally, we propose an organized segmentation process that achieves reliable performance with low variability for all topologies studied under uniform traffic conditions. These results encourages us to the search of a dynamic mechanism that adapts the routing algorithm to the traffic.
Year
DOI
Venue
2008
10.1109/ICPP.2008.56
ICPP
Keywords
Field
DocType
interconnections,network routing,network topology,network-on-chip,NoC,deadlock-free routing algorithms,embedded systems,interconnection network,off-chip high-performance interconnects,routing algorithm,segment-based routing,segment-based routing methodology,traffic pattern,uniform traffic conditions,NoC,Routing algorithms,segment based routing,sr
Link-state routing protocol,Multipath routing,Dynamic Source Routing,Hierarchical routing,Policy-based routing,Computer science,Static routing,Computer network,Destination-Sequenced Distance Vector routing,Routing table,Distributed computing
Conference
Citations 
PageRank 
References 
22
0.85
4
Authors
3
Name
Order
Citations
PageRank
Andres Mejia11315.97
J. Flich277552.09
Jose Duato389354.65