Paper Info
Title
A 3.3-mW ΣΔ modulator for UMTS in 0.18-μm CMOS with 70-dB dynamic range in 2-MHz bandwidth
Abstract
A quadrature fourth-order, continuous-time, SigmaDelta modulator with 1.5-b quantizer and feedback digital-to-analog converter (DAC) for a universal mobile telecommunication system (UNITS) receiver chain is presented. It achieves a dynamic range of 70 dB in a 2-MHz bandwidth and the total harmonic distortion is -74 dB at full-scale input. When used in an integrated receiver modulator substantially for UMTS, the dynamic range of the reduces the need for analog automatic gain control and its tolerance of large out-of-band interference also permits the use of only first-order prefiltering. An IC including an I and Q SigmaDelta modulator, phase-locked loop, oscillator, and bandgap dissipates 11.5 mW at 1.8 V. The active area is 0.41 mm(2) in a 0.18-mum 1-poly 5-metal CMOS technology.
Year
DOI
Venue
2002
10.1109/JSSC.2002.804329
IEEE Journal of Solid-state Circuits
Keywords
DocType
Volume
3G mobile communication,CMOS integrated circuits,automatic gain control,circuit feedback,continuous time systems,harmonic distortion,phase locked loops,quantisation (signal),sigma-delta modulation,ΣΔ modulator,0.18 micron,1.8 V,11.5 mW,2 MHz,3.3 mW,CMOS,UMTS,analog automatic gain control,dynamic range,feedback digital-to-analog converter,out-of-band interference,phase-locked loop,quadrature fourth-order continuous-time circuit,quantizer,receiver chain,total harmonic distortion,universal mobile telecommunication system
Journal
37
Issue
ISSN
Citations 
12
0018-9200
12
PageRank 
References 
Authors
3.00
0
4
Name
Order
Citations
PageRank
Robert H. M. van Veldhoven17613.13
B. J. Minnis2123.00
H. A. Hegt3123.00
A. H. M. van Roermund47716.14