Paper Info
Title
Statistical blockade: very fast statistical simulation and modeling of rare circuit events and its application to memory design
Abstract
Circuit reliability under random parametric variation is an area of growing concern. For highly replicated circuits, e.g., static random access memories (SRAMs), a rare statistical event for one circuit may induce a not-so-rare system failure. Existing techniques perform poorly when tasked to generate both efficient sampling and sound statistics for these rare events. Statistical blockade is a novel Monte Carlo technique that allows us to efficiently filter--to block--unwanted samples that are insufficiently rare in the tail distributions we seek. The method synthesizes ideas from data mining and extreme value theory and, for the challenging application of SRAM yield analysis, shows speedups of 10-100 times over standard Monte Carlo.
Year
DOI
Venue
2009
10.1109/TCAD.2009.2020721
IEEE Trans. on CAD of Integrated Circuits and Systems
Keywords
DocType
Volume
memory design,random parametric variation,circuit reliability,standard Monte Carlo,statistical simulation,rare statistical event,SRAM yield analysis,rare event,static random access memory,challenging application,rare circuit event,Statistical blockade,novel Monte Carlo technique
Journal
28
Issue
ISSN
Citations 
8
0278-0070
74
PageRank 
References 
Authors
3.08
11
2
Name
Order
Citations
PageRank
Amith Singhee134722.94
Rob A. Rutenbar22283280.48