Name
Title | ||
|---|---|---|
Revisiting Shared Cache Contention Problems: A Practical Hardware-Software Cooperative Approach |
Abstract | ||
|---|---|---|
Although shared caches allow the dynamic allocation of limited cache capacity among cores, traditional LRU replacement policies often cannot prevent negative interference among cores. To address the contention problem in shared caches, cache partitioning and application scheduling techniques have been extensively studied. Partitioning explicitly determines cache capacity for each core to maximize the overall throughput. On the other hand, application scheduling by operating systems groups the least interfering applications for each shared cache, when multiple shared caches exist in systems. Although application scheduling can mitigate the contention problem without any extra hardware support, its effect can be limited for some severe contentions. This paper proposes a low cost solution, based on application scheduling with a simple cache insertion control. Instead of using a full hardware-based cache partitioning mechanism, the proposed technique mostly relies on application scheduling. It selectively uses LRU insertion to the shared caches, which can be added with negligible hardware changes from the current commercial processor designs. For the completeness of cache interference evaluation, this paper examines all possible mixes from a set of applications, instead of using a just few selected mixes. The evaluation shows that the proposed technique can mitigate the cache contention problem effectively, close to the ideal scheduling and partitioning. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1587/transinf.E96.D.1457 | IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS |
Keywords | Field | DocType |
multi-core, resource contentions, cache partitioning, application scheduling | Computer vision,Computer architecture,Shared memory,Computer science,Parallel computing,Cache algorithms,Cache coloring,Artificial intelligence,Application scheduling,Hardware software,Smart Cache,Multi-core processor | Journal |
Volume | Issue | ISSN |
E96D | 7 | 1745-1361 |
Citations | PageRank | References |
0 | 0.34 | 7 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Eunji Pak | 1 | 0 | 0.34 |
| Sanghoon Kim | 2 | 290 | 42.00 |
| Jaehyuk Huh | 3 | 1008 | 63.91 |
| Seungryoul Maeng | 4 | 730 | 47.58 |