Title
A compact digital amplitude modulator in 90nm CMOS
Abstract
This paper presents a 90 nm CMOS digital amplitude modulator for polar transmitter. It reaches an output power of -2.5 dBmRMS using a WLAN OFDM 64QAM modulation at 2.45GHz achieving -26.1 dB EVM and 18% efficiency. To reduce the aliases due to the discrete-time to continuous-time conversion a 2-fold interpolation has been implemented. The amplitude modulator has a segmented architecture. This results in a very compact 0.007 mm2 chip area.
Year
DOI
Venue
2010
10.1109/DATE.2010.5457112
DATE
Keywords
Field
DocType
CMOS integrated circuits,OFDM modulation,amplitude modulation,interpolation,wireless LAN,2-fold interpolation,CMOS digital amplitude modulator,WLAN OFDM 64QAM modulation,compact digital amplitude modulator,continuous-time conversion,discrete-time conversion,frequency 2.54 GHz,polar transmitter,size 90 nm
Quadrature amplitude modulation,Computer science,CMOS,Chip,Radio frequency,Electronic engineering,Modulation,Amplitude modulation,Electrical engineering,Amplitude,Orthogonal frequency-division multiplexing
Conference
ISSN
Citations 
PageRank 
1530-1591
1
0.47
References 
Authors
4
5
Name
Order
Citations
PageRank
V. Chironi1153.96
Björn Debaillie212419.27
A. Baschirotto317654.55
J. Craninckx410257.39
M. Ingels510.47