Name
Abstract | ||
|---|---|---|
This paper describes techniques for reasoning about the real-time behaviour of low-level code. Higher-level reasoning and more compact notation are achieved through the use of functional logic, which allows both time and the current trace to be implicit parameters. The approach is illustrated by outlining a case study: specification and verification of a simplified version of the RS232 Software Repeater Problem. |
Year | Venue | Keywords |
|---|---|---|
1992 | IFIP Congress (1) | functional verification,hard real-time programs |
Field | DocType | Volume |
Functional verification,Software engineering,Intelligent verification,Computer science,Software verification | Conference | 12 |
ISSN | ISBN | Citations |
0926-5473 | 0-444-89747-X | 2 |
PageRank | References | Authors |
0.67 | 1 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Peter Kearney | 1 | 66 | 9.44 |
| John Staples | 2 | 103 | 22.59 |
| A. Abbas | 3 | 2 | 1.00 |