Name
Abstract | ||
|---|---|---|
High-performance logtc circuitry for mairlfrarne com- puters IS most commonly tmpltrnerttcd trt the btpolar emitter-coupled logtc (E CL) faintly. BtC,~~OS cir- cuits are becoming increastng(y common tJt dlgztal ap- plications. The .wmulaiton of such circuits twih a general pUrpOSe CirCUl~ alla/,~SIS tOO( 1S Z)<rq COlllptL~e - intensive. Thts paper pre.scnts an effhent smzulatloa methodology for ECL bipolar deszgrrs. By us)ng an event-driven scheme to explod the underlying latency in the circud and by using simplified deuzce n~od- e~s, eficient slmaiatzon ts accomplished uJ)ilc siuylng within tolerable error boands. |
Year | DOI | Venue |
|---|---|---|
1991 | 10.1145/127601.127620 | DAC |
Field | DocType | ISBN |
Logic gate,Digital electronics,Computer science,Transistor–transistor logic,Emitter-coupled logic,Real-time computing,Electronic engineering,Resistor–transistor logic,Logic family,Integrated injection logic,Electrical engineering,Asynchronous circuit | Conference | 0-89791-395-7 |
Citations | PageRank | References |
0 | 0.34 | 5 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| C. Visweswariah | 1 | 507 | 58.12 |
| R. A. Rohrer | 2 | 796 | 240.52 |