Name
Abstract | ||
|---|---|---|
The architecture and programming aspects of a programmable video signal processor are discussed. The processor is an integrated circuit that has a modular architecture with a number of programmable, pipelined processing elements. Networks of these processors can be programmed conveniently with the aid of dedicated programming tools. In this paper the emphasis is on the scheduling of video algorithms and the micro code generation for a network of video signal processors. Due to the periodic nature of the video algorithms and the small periods that are involved, successive executions of the video algorithm have to be interleaved in time. We present a novel solution approach to the scheduling problem using phase assignment as the central part. Results of this approach are presented for industrially significant video applications. |
Year | DOI | Venue |
|---|---|---|
1991 | 10.1145/123465.123502 | MICRO |
Keywords | Field | DocType |
vliw style,programmable video signal processor,integrated circuit,scheduling problem,code generation,high level synthesis | Architecture,Computer architecture,Digital signal processor,Very long instruction word,Computer science,Parallel computing,High-level synthesis,Real-time computing | Conference |
ISBN | Citations | PageRank |
0-89791-460-0 | 3 | 0.84 |
References | Authors | |
5 | 6 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| G. Essink | 1 | 178 | 26.64 |
| E. Aarts | 2 | 3 | 0.84 |
| R. van Dongen | 3 | 12 | 3.47 |
| P. Van Gerwen | 4 | 29 | 10.63 |
| J. Korst | 5 | 5 | 1.36 |
| K. Vissers | 6 | 3 | 0.84 |