Title
Low Power 10-B 250 Msample/S Cmos Cascaded Folding And Interpolating A/D Converter
Abstract
This paper introduces a new folding amplifier in a folding and interpolating 10-b ADC. The amplifier consists of current mirrors and differential stages. Only one current source is exploited in cascaded differential pairs, which reduces the power consumption significantly. In the folding circuit. the interpolation is implemented with a current division technique. An experiment of the amplifier in 10-b folding signal has been integrated in a single-poly four-metal 0.35 mu m CMOS process. The simulation in 10-b folding ADC shows that power consumption is 225 mW at the sampling speed of 250 Msample/s and the power supply of 3.3 V. The preliminary experiment indicates the current steering folder and digital bits operate as expected.
Year
DOI
Venue
2009
10.1587/transele.E92.C.1073
IEICE TRANSACTIONS ON ELECTRONICS
Keywords
DocType
Volume
A/D converter, current mirror, folding, interpolation, CMOS process
Journal
E92C
Issue
ISSN
Citations 
8
1745-1353
1
PageRank 
References 
Authors
0.40
4
4
Name
Order
Citations
PageRank
Zhi-yuan Cui141.36
Yong-Gao JIN230.93
Nam-soo Kim33210.48
Ho-yong Choi473.00