Abstract | ||
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In this paper we discuss the development of two emulation platforms for transactional memory systems on a single Field Programmable
Gate Array (FPGA). We introduce two systems, integrating only off-the-shelf components, that respectively use a centralized
and a distributed approach, presenting their hardware and software design. We analyze and compare these two architectures
to a lock based multiprocessor prototype, discussing the trade-offs in terms of design complexity, performance and scalability.
|
Year | DOI | Venue |
---|---|---|
2011 | 10.1007/978-3-642-19137-4_7 | Architektur von Rechensystemen |
Keywords | Field | DocType |
single field programmable gate,off-the-shelf component,design complexity,multiprocessor prototype,emulation platform,software design,transactional memory system,fpga multiprocessors,system integration,field programmable gate array,transactional memory | Software transactional memory,Software design,Computer science,Real-time computing,Transactional memory,Computer architecture,Shared memory,Parallel computing,Field-programmable gate array,Multiprocessing,Emulation,Embedded system,Scalability | Conference |
Volume | ISSN | Citations |
6566 | 0302-9743 | 1 |
PageRank | References | Authors |
0.35 | 9 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Matteo Pusceddu | 1 | 1 | 0.35 |
Simone Ceccolini | 2 | 1 | 0.35 |
Antonino Tumeo | 3 | 356 | 44.70 |
Gianluca Palermo | 4 | 938 | 75.81 |
D. Sciuto | 5 | 1720 | 176.61 |