Title
Poisson AER generator: inter-spike-intervals analysis
Abstract
Address-event-representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, originally developed for bio-inspired processing systems (for example, image processing). Such systems may consist of a complicated hierarchical structure with many chips that transmit data among them in real time, while performing some processing (for example, convolutions). To develop AER based systems for image processing it is very convenient to have available some kind of tool for generating AER streams from on-computer stored images. In this paper we present a hardware method for generating AER streams with Poisson statistics in real time from a sequence of images stored in a computer's memory. We quantify that the events generated follow a Poisson distribution using the Kolmogorov-Smirnov test. We have developed a USB-AER board, based on the Xilinx Spartan II FPGA and the Cygnal 8051 microcontroller, developed by our RTCAR group have been used for the analysis
Year
DOI
Venue
2006
10.1109/ISCAS.2006.1693293
Island of Kos
Keywords
Field
DocType
Poisson distribution,VLSI,field programmable gate arrays,hierarchical systems,image sequences,microcontrollers,protocols,AER generator,AER streams,FPGA,Kolmogorov-Smirnov test,Poisson statistics,USB-AER board,VLSI chips,address event representation,communication protocol,image processing,images sequence,interspike-intervals analysis,microcontroller
Asynchronous communication,Computer science,Convolution,Field-programmable gate array,Image processing,Real-time computing,Electronic engineering,Microcontroller,Poisson distribution,Very-large-scale integration,Communications protocol
Conference
ISSN
ISBN
Citations 
0271-4302
0-7803-9389-9
4
PageRank 
References 
Authors
0.52
0
7