Abstract | ||
---|---|---|
In this work, some of the tradeoffs that need to be considered in optimizing a back-illuminated (BSI) sensor were described. The manufacturing feasibility of a BSI CMOS image sensor was demonstrated and compared between the front-illuminated (FSI) and back-illuminated (BSI) versions of the sensor with the same fabrication process. 3D integration processes were evaluated to get stable performance of BSI CMOS image sensor.The broadband quantum efficiency (81% for BSI) improved 2.7 times over FSI sensitivity. |
Year | DOI | Venue |
---|---|---|
2011 | 10.1109/3DIC.2012.6263018 | 3DIC |
Keywords | Field | DocType |
efficiency 81 percent,cmos image sensors,broadband quantum efficiency,planarity effect,back illuminated image sensor,three-dimensional integrated circuits,manufacturing feasibility,circuit optimisation,integrated circuit bonding,3d integrated bsi cmos image sensor,3d integration processes,fsi sensor,front-illuminated sensor | Camera module,Wafer bonding,Image sensor,Electronic engineering,Chip,CMOS sensor,Lens (optics),Pixel,Engineering,Image resolution,Optoelectronics | Conference |
ISBN | Citations | PageRank |
978-1-4673-2189-1 | 0 | 0.34 |
References | Authors | |
0 | 9 |
Name | Order | Citations | PageRank |
---|---|---|---|
Nam Hee Kwon | 1 | 0 | 0.34 |
S. M. Hong | 2 | 8 | 2.97 |
Yong-Won Cha | 3 | 0 | 0.34 |
Sun Jae Lee | 4 | 0 | 0.34 |
Han Gyul Lee | 5 | 0 | 0.34 |
Areum Kim | 6 | 0 | 0.68 |
Soo Won Kim | 7 | 4 | 2.28 |
Chang Hyun Kim | 8 | 47 | 21.59 |
Sung Gyu Pyo | 9 | 0 | 0.34 |