Name
Abstract | ||
|---|---|---|
This work presents a novel sorting network based on the "sorting by counting" algorithm. The proposed implementation of the algorithm is very regular. Further, its realization depends on a design parameter, that permits different tradeoffs between speed and area to be chosen. For example, we can fix this parameter to obtain a feasible SN with n inputs and O(log(n)) elaboration time with a reasonable multiplicative constant. Comparisons with previous works show that under some metrics for a wide range of values of n we obtain the best results. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1016/j.sysarc.2006.04.002 | Journal of Systems Architecture |
Keywords | Field | DocType |
elaboration time,design parameter,best result,sorting networks,digital circuits,scalable vlsi speed,area tunable,previous work,feasible sn,different tradeoffs,proposed implementation,wide range,n input,sorting network | Sorting network,Digital electronics,Multiplicative function,Computer science,Parallel computing,Sorting,Very-large-scale integration,Scalability | Journal |
Volume | Issue | ISSN |
52 | 10 | Journal of Systems Architecture |
Citations | PageRank | References |
2 | 0.37 | 11 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Giuseppe Campobello | 1 | 54 | 11.19 |
| M. Russo | 2 | 425 | 37.60 |