Title
A FIFO Data Switch Design Experiment
Abstract
A core problem in many pipelined circuit designs is data-dependent data flow. We describe a methodology and a set of circuit modules to address this problem in the asynchronous domain. We call our methodology P**3, or "P cubed." Items flowing through a set of FIFO datapaths can be conditionally steered under the control of data carried by other FIFOs. We have used the P**3 methodology to design and implement a FIFO test chip that uses a data-dependent switch to conditionally delete data items. The circuit uses two on-chip FIFO rings as high-speed data sources. It was fabricated through MOSIS using their 0.6m CMOS design rules. The peak data switch throughput was measured to be a minimum of 580 million data items per second at nominal Vdd of 3.3V.
Year
DOI
Venue
1998
10.1109/ASYNC.1998.666490
ASYNC
Keywords
Field
DocType
peak data,fifo data switch design,million data item,data item,fifo datapaths,data-dependent data flow,methodology p,fifo test chip,high-speed data source,circuit module,p cubed,design rules,asynchronous,cmos integrated circuits,data switch,data flow,circuit design,fifo,chip
Asynchronous communication,FIFO (computing and electronics),Computer science,Chip,Network switch,CMOS,Throughput,Computer hardware,Data flow diagram,Embedded system
Conference
ISBN
Citations 
PageRank 
0-8186-8392-9
6
1.38
References 
Authors
9
5
Name
Order
Citations
PageRank
William S. Coates18714.61
Jon K. Lexau220931.97
Ian W. Jones310816.32
Scott M. Fairbanks4478.41
I. E. Sutherland515202067.03