Name
Abstract | ||
|---|---|---|
Recent progress in scaled CMOS technologies can enhance signal bandwidth and clock frequency of analog-digital mixed VLSIs. However, the inevitable reduction of supply voltage causes a signal voltage mismatch between a non-scaled analog chip and a scaled AD mixed chip. To overcome this problem, we present a Delta-Amplifier (DeltAMP) which can handle larger signal amplitude than the supply voltage. DeltaAMP folds a delta signal of an input voltage within a window using a virtual ground amplifier, modulation switches and comparators. For reconstruction of the folded delta signal to the ordinal signal, Analog-Time-Digital conversion (ATD) was also proposed, in which pulse-width analog information obtained at the comparators in DeltAMP was converted to a digital signal by counting. A test chip of DeltAMP with ATD was designed and fabricated using a 90 nm CMOS technology. A 2 Vpp input voltage range and 50 mu W power consumption were achieved by the measurements with a 0.5 V supply. High accuracy of 62 dB SNR was obtained at signal bandwidth of 120 kHz. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1587/transele.E92.C.828 | IEICE TRANSACTIONS ON ELECTRONICS |
Keywords | Field | DocType |
scaled CMOS technology, voltage mismatch, DeltAMR, analog-time-digital conversion (ATD) | Virtual ground,Comparator,Digital signal,CMOS,Modulation,Electronic engineering,Bandwidth (signal processing),Analog signal,Engineering,Electrical engineering,Amplifier | Journal |
Volume | Issue | ISSN |
E92C | 6 | 1745-1353 |
Citations | PageRank | References |
1 | 0.37 | 0 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yoshihiro Masui | 1 | 7 | 2.66 |
| Takeshi Yoshida | 2 | 30 | 9.22 |
| Atsushi Iwata | 3 | 30 | 8.84 |