Name
Abstract | ||
|---|---|---|
In this paper, a novel architecture of a floating-point digital signal processor is presented. It introduces a single hardware
structure with a full set of elementary arithmetic functions which includessin, cos, tan, arctanh, circular rotation andvectoring, sinh, cosh, tanh, arctanh, hyperbolic rotation andvectoring, square root, logarithm, exponential as well asaddition, multiplication anddivision. The architecture of the processor is based on the COordinate Rotation DIgital Computer (CORDIC) and the Convergence Computing
Method (CCM) algorithms for computing arithmetic functions and it is fully parallel and pipelined. Its advanced functionality
is achieved without significant increase in hardware, in comparison to ordinary CORDIC processor, and makes it an ideal processing
element in high speed multiprocessor applications, e.g. real time Digital Signal Processing (DSP) and computer graphics. |
Year | DOI | Venue |
|---|---|---|
1995 | 10.1007/BF02407026 | VLSI Signal Processing |
Keywords | Field | DocType |
Arithmetic Function,CORDIC Algorithm,Pipe Segment,Exponential Mode,Discrete Hartley Transform | Digital signal processing,Floating-point unit,Arbitrary-precision arithmetic,Digital signal processor,Floating point,Computer science,Parallel computing,Theoretical computer science,CORDIC,Logarithmic number system,Saturation arithmetic | Journal |
Volume | Issue | ISSN |
10 | 1 | 0922-5773 |
Citations | PageRank | References |
3 | 0.47 | 11 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Dimitris E Metafas | 1 | 21 | 5.71 |
| C. E. Goutis | 2 | 18 | 2.06 |