Name
Abstract | ||
|---|---|---|
Practical assumptions in the implementation of a delay calculation software system yielded a means to economically calculate MOSFET chip circuit delays with sufficient accuracy for effective digital simulation.
|
Year | DOI | Venue |
|---|---|---|
1978 | 10.1109/DAC.1978.1585205 | DAC |
Keywords | Field | DocType |
sufficient accuracy,effective digital simulation,practical assumption,mosfet digital logic chip,delay calculation software system,high performance delay calculation,mosfet chip circuit delay,stepwise refinement,chip,computational modeling,logic circuits,digital logic,switches,capacitance,software systems,pseudo code | Delay calculation,Logic gate,Capacitance,Computer science,Pseudo-code,Electronic engineering,Chip,Software system,Boolean algebra,MOSFET | Conference |
ISBN | Citations | PageRank |
978-0-89791-020-0 | 1 | 11.06 |
References | Authors | |
0 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ants Koppel | 1 | 1 | 11.06 |
| Siddharth Shah | 2 | 1 | 11.06 |
| Prem Puri | 3 | 1 | 11.06 |