Paper Info
Title
A Design Of Pipelined Architecture For Hierarchical Block-Matching Algorithm
Abstract
Motion estimation is a major part of the video coding, which traces the motion of moving objects in video sequences. Among various motion estimation algorithms, the Hierarchical Block-Matching Algorithm (HBMA) that is a multilayered motion estimation algorithm is attractive in motion-compensated interpolation when accurate motion estimation is required. However, parallel processing of HBMA is necessary since the high computational complexity of HBMA prevents it from operating in real-time. Further, the repeated updates of vectors naturally lead to pipelined processing. In this paper, we present a pipelined architecture for HBMA. We investigate the data dependency of HBMA and the requirements of the pipeline to operate synchronously. Each pipeline stage of the proposed architecture consists of a systolic array for the block-matching algorithm, a bilinear interpolator, and a latch mechanism. The latch mechanism mainly resolves the data dependency and arranges the data flow in a synchronous way. The proposed architecture achieves nearly linear speedup without additional hardware cost over a non-pipelined one. It requires the clock of 2.70 ns to process a large size of frame (e.q. HDTV) in real-time, which is about to be available under the current VLSI technology.
Year
Venue
Keywords
1995
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS
PARALLEL ARCHITECTURE, MOTION ESTIMATION ALGORITHM, VIDEO CODING
Field
DocType
Volume
Block-matching algorithm,Architecture,Computer science,Parallel computing,Motion estimation algorithm,Parallel architecture
Journal
E78D
Issue
ISSN
Citations 
5
0916-8532
0
PageRank 
References 
Authors
0.34
0
3
Name
Order
Citations
PageRank
Hyung Chul Kim1203.52
Seung Ryoul Maeng28519.68
Jung Wan Cho36479.18