Title
Crossing Reduction For Orthogonal Circuit Visualization
Abstract
Visualization of circuits is an important research area in electronic design automation. Locating errors in a large design may require a high-quality graphical representation of a circuit that allows humans to understand it. Usually, drawing a circuit is based on visualizing the corresponding graph or hypergraph structure where nodes are connected by straight lines, and nodes are located in a way that minimizes the crossings of these lines. In this paper, we address the problem of retransforming this graph representation back to an orthogonal circuit structure, i.e. replacing the straight lines by horizontal and vertical lines. An efficient algorithm is presented that minimizes the crossing given this "new criterion". Experimental results are provided that demonstrate the efficiency of the approach.
Year
Venue
Field
2003
VLSI'03: PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON VLSI
Engineering drawing,Computer science,Visualization,Electronic engineering
DocType
Citations 
PageRank 
Conference
1
0.37
References 
Authors
1
3
Name
Order
Citations
PageRank
Thomas Eschbach1334.00
Wolfgang Günther210.37
B. Becker341136.80