Title
Low-Complexity Hyperspectral Image Compression on a Multi-tiled Architecture
Abstract
The increasing amount of data produced in satellites poses a downlink communication problem due to the limited data rate of the downlink. This bottleneck is solved by introducing more and more processing power on-board to compress data to a satisfiable rate. This paper introduces an algorithm which has been developed to compress hyperspectral images at low complexity and describes its mapping to a new hardware platform called the Xentium. It is characterized by both high flexibility as well as high processing power. After introducing the algorithm the Xentium hardware is described. The different mapping strategies are explained and a cycle estimation is derived. It turns out that the compression algorithm can indeed be efficiently mapped on a reconfigurable tile like the Xentium. An image of 1024 times 1024 with 50 bands can be compressed in about 4 seconds on a single tile. Adding more tiles gives a close to linear speedup.
Year
DOI
Venue
2009
10.1109/AHS.2009.28
San Francisco, CA
Keywords
Field
DocType
high processing power,different mapping strategy,compression algorithm,limited data rate,xentium hardware,new hardware platform,compress data,high flexibility,multi-tiled architecture,compress hyperspectral image,downlink communication problem,low-complexity hyperspectral image compression,digital signal processing,kernel,hardware,pixel
Bottleneck,Digital signal processing,Computer science,Computational science,Artificial intelligence,Speedup,Kernel (linear algebra),Computer vision,Parallel computing,Hyperspectral imaging,Pixel,Data compression,Telecommunications link
Conference
ISBN
Citations 
PageRank 
978-0-7695-3714-6
0
0.34
References 
Authors
4
4
Name
Order
Citations
PageRank
Karel H. G. Walters120.70
André Kokkeler28912.71
Sabih Gerez311111.24
Gerard J. M. Smit488889.18