Paper Info
Title
A Replica-Driving Technique for High Performance SC Circuits and Pipelined ADC Design
Abstract
This paper proposes a replica-driving technique that can be applied to implement low-power high-performance switched-capacitor (SC) amplifiers. The reduced swing range problem arising from the output-stage source-follower is resolved by a simple SC level shifter, without additional supply or static buffer. The output driving capability is enhanced by using a capacitively-controlled class-AB output stage. Owing to the high-speed open-loop output driving, the reference driver does not require any bypass capacitor. A prototype 12 bit 150 MS/s pipelined ADC was designed for concept proof in a 65 nm CMOS process. The ADC core consumes 75.6 mW at a 1.2 V supply. The measured DNL and INL are 0.5 LSB and 1.5 LSB, respectively. The SNDR and SFDR are 58.2 dB and 73.6 dB at 150 MS/s with an 8.3 MHz input.
Year
DOI
Venue
2013
10.1109/TCSII.2013.2268432
IEEE Trans. on Circuits and Systems
Keywords
Field
DocType
cmos process,pipelined adc design,cmos integrated circuits,output driving capability,capacitively-controlled class-ab output stage,static buffer,analogue-digital conversion,sndr,voltage 1.2 v,size 65 nm,amplifiers,pipelined adc,output-stage source-follower,low-power electronics,frequency 8.3 mhz,sfdr,reference driver,open-loop output driving,replica-driving technique,low-power switched-capacitor amplifiers,replica driving,reduced swing range problem,high performance sc circuits,switched-capacitor (sc) amplifier,word length 12 bit,sc level shifter,power 25.6 mw,pipeline processing,low power electronics
12-bit,Electronic engineering,CMOS,Spurious-free dynamic range,Decoupling capacitor,Logic level,Mathematics,Least significant bit,Amplifier,Low-power electronics
Journal
Volume
Issue
ISSN
60
9
1549-7747
Citations 
PageRank 
References 
7
0.80
6
Authors
4
Name
Order
Citations
PageRank
Chang-Kyo Lee1284.02
Wan Kim2504.96
Hyun-Wook Kang3657.86
Seung-Tak Ryu429946.61