Title
A Petri Net Approach for the Analysis of VHDL Descriptions
Abstract
In this paper we propose a methodology for the detection of some bad behaviours (e.g. deadlocks) in VHDL descriptions based on structural analysis techniques of Petri nets. The bad behaviours that we consider concern the execution control flow of a VHDL description. This methodology works in three steps. First, a formal description in Petri Net terms of the execution control flow of a VHDL description is realized. We present the basic rules to perform this translation. Second, a method to detect deadlocks using structural analysis techniques of Petri Nets based on structural invariants is applied. Finally, the information of the structural invariants allowing to decide the existence of a deadlock is used to fix the problem in VHDL terms.
Year
DOI
Venue
1993
10.1007/BFb0021711
CHARME
Keywords
Field
DocType
vhdl descriptions,petri net,structure analysis
Petri net,Programming language,Computer science,Deadlock,Formal description,Stochastic Petri net,Execution control,Invariant (mathematics),VHDL,Formal verification
Conference
ISBN
Citations 
PageRank 
3-540-56778-X
7
1.13
References 
Authors
4
2
Name
Order
Citations
PageRank
Serafín Olcoz1173.18
José Manuel Colom234131.92