Title
Design Techniques For Micro-Power Algorithmic Analog-To-Digital Converters
Abstract
The paper presents design techniques that enable the realization of micro-power algorithmic ADCs with potential applications in implantable biomedical devices and autonomous wireless sensor networks. Digital calibration and switched amplifiers are employed to reduce the analog power requirements. Additionally, the ADC is operated at a low voltage to minimize the digital power dissipation. Clock boosting, dc common mode level shifting, and an inversion coefficient based design methodology facilitate analog operation at low supply voltages. Simulation results indicate that a 10-bit, 50 kS/s converter realized in 0.5-mu m CMOS dissipates 40 mu W operating at a supply of 1.5 V.
Year
DOI
Venue
2007
10.1166/jolpe.2007.114
JOURNAL OF LOW POWER ELECTRONICS
Keywords
Field
DocType
Analog-to-Digital Converter, Algor ithmic ADC, Digital Calibration, Micro-Power, Low Voltage
Silicon on insulator,Electronic engineering,Engineering,Electrical engineering
Journal
Volume
Issue
ISSN
3
1
1546-1998
Citations 
PageRank 
References 
0
0.34
0
Authors
3
Name
Order
Citations
PageRank
Joachim Fenkes1121.30
Tobias Gemmeke2496.49
Jens Leenstra326123.74