Title
Co-Processor Synthesis: A New Methodology for Embedded Software Acceleration
Abstract
This paper introduces co-processor synthesis -- a methodology that provides design benefits by implementing hardware co-processors directly from embedded software. The paper examines the design benefits in this new approach vs behavioral synthesis and configurable processor methodologies.
Year
DOI
Venue
2004
10.1109/DATE.2004.1268929
DATE
Keywords
Field
DocType
embedded systems,reconfigurable computing,system on a chip,codesign,place and route,embedded software
Computer architecture,Embedded software,System on a chip,Computer science,Parallel computing,Place and route,Acceleration,Coprocessor,Behavioral synthesis,Reconfigurable computing,Embedded system
Conference
ISBN
Citations 
PageRank 
0-7695-2085-5
8
0.62
References 
Authors
11
2
Name
Order
Citations
PageRank
Ben I. Hounsell1201.95
Richard N. Taylor25395482.75