Name
Title | ||
|---|---|---|
Optimal common-centroid-based unit capacitor placements for yield enhancement of switched-capacitor circuits |
Abstract | ||
|---|---|---|
Yield is defined as the probability that the circuit under consideration meets with the design specification within the tolerance. Placement with higher correlation coefficients has fewer mismatches and lower variation of capacitor ratio, thus achieving higher yield performance. This study presents a new optimization criterion that quickly determines if the placement is optimal. The optimization criterion leads to the development of the concepts of C-entries and partitioned subarrays which can significantly reduce the searching space for finding the optimal/near-optimal placements on a sufficiently large array size. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1145/2534394 | ACM Trans. Design Autom. Electr. Syst. |
Keywords | Field | DocType |
yield enhancement,large array size,higher yield performance,switched-capacitor circuit,new optimization criterion,fewer mismatches,optimal common-centroid-based unit capacitor,optimization criterion,lower variation,design specification,capacitor ratio,higher correlation coefficient,near-optimal placement,process variation,design,algorithms,spatial correlation,performance | Capacitor,Spatial correlation,Computer science,Control theory,Switched capacitor,Process variation,Design specification,Centroid | Journal |
Volume | Issue | ISSN |
19 | 1 | 1084-4309 |
Citations | PageRank | References |
5 | 0.43 | 11 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chien-Chih Huang | 1 | 224 | 10.26 |
| Chin-Long Wey | 2 | 316 | 56.51 |
| Jwu-E Chen | 3 | 223 | 28.37 |
| Pei-Wen Luo | 4 | 74 | 8.22 |