Name
Title | ||
|---|---|---|
A transition-signaling bundled data NoC switch architecture for cost-effective GALS multicore systems |
Abstract | ||
|---|---|---|
Asynchronous networks-on-chip (NoCs) are an appealing solution to tackle the synchronization challenge in modern multicore systems through the implementation of a GALS paradigm. However, they have found only limited applicability so far due to two main reasons: the lack of proper design tool flows as well as their significant area footprint over their synchronous counterparts. This paper proposes a largely unexplored design point for asynchronous NoCs, relying on transition-signaling bundled data, which contributes to break the above barriers. Compared to an existing lightweight synchronous switch architecture, xpipesLite, the post-layout asynchronous switch achieved a 71% reduction in area, up to 85% reduction in overall power consumption, and a 44% average reduction in energy-per-flit, while mastering the more stringent timing assumptions of this solution with a semi-automated synthesis flow. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.7873/DATE.2013.079 | DATE |
Keywords | Field | DocType |
existing lightweight synchronous switch,unexplored design point,data noc switch architecture,post-layout asynchronous,cost-effective gals multicore system,appealing solution,asynchronous nocs,proper design tool,average reduction,significant area footprint,synchronous counterpart,asynchronous networks-on-chip,aging,robustness,switches | Asynchronous communication,Architecture,Synchronization,Computer science,Parallel computing,Design tool,Real-time computing,Multicore systems,Embedded system,Power consumption | Conference |
ISSN | Citations | PageRank |
1530-1591 | 28 | 1.21 |
References | Authors | |
21 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Alberto Ghiribaldi | 1 | 52 | 3.86 |
| Davide Bertozzi | 2 | 1653 | 99.83 |
| Steven M. Nowick | 3 | 776 | 75.15 |