Name
Title | ||
|---|---|---|
Scan design with shadow flip-flops for low performance overhead and concurrent delay fault detection |
Abstract | ||
|---|---|---|
This paper presents new scan solutions with low latency overhead and on-line monitoring support. Shadow flip-flops with scan design are associated to system flip-flops in order to (a) provide concurrent delay fault detection and (b) avoid the scan chain insertion of system flip-flops. A mixed scan architecture is proposed which involves flip-flops with shadow scan design at the end of timing-critical paths and flip-flops with standard scan at non-critical locations. In order to preserve system controllability during test, system flip-flops with shadow scan can be set in scan mode and selectively reset before switching to capture mode. It is shown that shadow scan design with asynchronous set and reset may have a lower latency overhead than standard scan design. A shadow scan solution is proposed which, in addition to concurrent delay fault detection, provides simultaneous scan and capture capability. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.7873/DATE.2013.227 | DATE |
Keywords | Field | DocType |
system controllability,on-line monitoring support,chain insertion,low latency overhead,low performance overhead,asynchronous set,non-critical location,system flip-flop,shadow flip-flop,concurrent delay fault detection,lower latency overhead,fault detection | Asynchronous communication,Shadow,Controllability,FLOPS,Latency (engineering),Computer science,Fault detection and isolation,Scan chain,Real-time computing,Latency (engineering) | Conference |
ISSN | Citations | PageRank |
1530-1591 | 3 | 0.42 |
References | Authors | |
15 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sébastien Sarrazin | 1 | 3 | 1.09 |
| Samuel Evain | 2 | 73 | 6.98 |
| Lirida Alves de Barros Naviner | 3 | 34 | 4.41 |
| Y. Bonhomme | 4 | 186 | 12.16 |
| Valentin Gherman | 5 | 36 | 3.35 |