Abstract | ||
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To achieve superior performance, rate-distortion optimized motion estimation (ME) for variable block size (RDO VBSME) is often used in state-of-the-art video coding systems such as the H.264 JM software. However, the complexity of RDO-VBSME is very high both for software and hardware implementations. In this paper, we propose a hardware-friendly ME algorithm called RDOMFS with a novel hardware-friendly rate-distortion (RD)-like cost function, and a hardware-friendly modified motion vector predictor. Simulation results suggest that the proposed RDOMFS can achieve essentially the same RD performance as RDO-VBSME in JM. We also propose a matching hardware architecture with a novel Smart Snake Scanning order which can achieve very high data re-use ratio and data throughout. It is also reconfigurable because it can achieve variable data re-use ratio and can process variable frame size. The design is implemented with TSMC 0.18 μm CMOS technology and costs 103 k gates. At a clock frequency of 63 MHz, the architecture achieves real-time 1920 × 1080 RDO-VBSME at 30 frames/s. At a maximum clock frequency of 250 MHz, it can process 4096 × 2160 at 30 frames/s. |
Year | DOI | Venue |
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2011 | 10.1109/TCSVT.2011.2106274 | IEEE Trans. Circuits Syst. Video Techn. |
Keywords | Field | DocType |
re-use ratio,hardware architecture,h.264 jm software,data re-usable hardware architecture,data re-use,rd performance,hardware-friendly me algorithm,rate-distortion optimized motion estimation,hardware description languages,novel hardware-friendly rate-distortion,rdomfs,novel rd-optimized vbsme,motion estimation,hardware,software-hardware co-design,cmos technology,size 0.18 mum,telecommunication computing,smart snake scanning,vhdl,video coding,hardware-software codesign,variable data,hardware-friendly modified motion vector,high data,scanning order,frequency 63 mhz,rd-optimized vbsme,matching highly data re-usable,frequency 250 mhz,rate distortion theory,variable block size,variable frame size,state-of-the-art video coding system,psnr,memory management,strontium | Computer science,Software,Artificial intelligence,Motion estimation,Computer hardware,Hardware description language,Block size,Computer vision,VHDL,Clock rate,Embedded system,Hardware architecture,Motion vector | Journal |
Volume | Issue | ISSN |
21 | 2 | 1051-8215 |
Citations | PageRank | References |
9 | 0.73 | 14 |
Authors | ||
6 |